As can be seen, this is a very simple circuit at this point, 1 IC, a series of pull up resistors, and a jumper to bypass the IRQ logic chip.
The circuit was originally fairly complex with between 6 and 8 IC chips. When I was laying out the PCB, I found it was taking up too much real estate, and on top of it, with the way everything was connected, it was becoming extremely difficult to keep traces separated with only 2 layers for signal - even though I was doing a 4 layer board, the inner two layers were setup for power and ground.
The chip itself, utilizing some primitives from Altera and the MAX II+ Baseline software, I laid out the circuit and burned it into the chip, the section below talks more about the chip itself. Although I am not a VHDL programmer, the MAX software allows for graphical editing which does make life much easier.
Here is the logic that is in the MAX 7000s series chip I used. The chip is a 44 pin PLD in a PLCC case. It is one of Altera's smaller IC's, but it is more then sufficient for my needs. I do appologize that the picture is a bit hard to see, the full size of the graphic is just too big and I couldn't get a screenshot big enough to capture it in large text.
But, with some observation, you can see how this is a fairly simple design. A set of 74148 megafunctions (came with the software), and a few AND gates, NOT gates, and some output enable controls it is very easy to design a complex circuit into a single chip. This is all reproduceable as VHDL, but as I don't know VHDL, the use of gates and interconnections work quite well for me. I found the use of this sofware a wonderful way to get my programmable arrays without having to spend a lot of time learning a new language.
I will learn VHDL some day, but I also needed to get this project going, and that would have held me up, especially considering what this and the other custom chip I created needed to do.